LDM
Load Multiple registers.
Syntax
LDM
{
}{addr_mode
} cond
{!}, Rn
{^}reglist
where:
addr_mode
is any one of the following:
IA
- Increment address After each transfer. This is the default, and can be omitted.
IB
- Increment address Before each transfer (A32 only).
DA
- Decrement address After each transfer (A32 only).
DB
- Decrement address Before each transfer.
You can also use the stack oriented addressing mode suffixes, for example, when implementing stacks.
cond
- is an optional condition code.
Rn
- is the base register, the ARM register holding the
initial address for the transfer.
Rn
must not be PC. !
- is an optional suffix. If ! is present, the
final address is written back into
Rn
. reglist
- is a list of one or more registers to be loaded, enclosed in braces. It
can contain register ranges. It must be comma separated if it contains more
than one register or register range. Any combination of registers
R0
toR15
(PC) can be transferred in A32 state, but there are some restrictions in T32 state. ^
-
is an optional suffix, available in A32 state only. You must not use it in User mode or System mode. It has the following purposes:
- If
reglist
contains the PC (R15
), in addition to the normal multiple register transfer, theSPSR
is copied into theCPSR
. This is for returning from exception handlers. Use this only from exception modes. - Otherwise, data is transferred into or out of the User mode registers instead of the current mode registers.
- If
Restrictions on reglist in 32-bit T32 instructions
In 32-bit T32 instructions:
- The SP cannot be in the list.
- The PC and LR cannot both be in the list.
- There must be two or more registers in the list.
If you write an LDM
instruction
with only one register in reglist, the assembler automatically substitutes the
equivalent LDR
instruction. Be aware of this when
comparing disassembly listings with source code.
You can use the --diag_warning
1645
assembler command line option to check when an instruction
substitution occurs.
Restrictions on reglist in A32 instructions
A32 load instructions can have SP and PC in the reglist
but these instructions that include SP in the
reglist
or both PC and LR in the reglist
are deprecated.
16-bit instructions
16-bit versions of a subset of these instructions are available in T32 code.
The following restrictions apply to the 16-bit instructions:
- All registers in
must be Lo registers.reglist
must be a Lo register.Rn
must be omitted (oraddr_mode
IA
), meaning increment address after each transfer.- Writeback must be specified for LDM
instructions where
is not in theRn
.reglist
In addition, the PUSH
and POP
instructions
are subsets of the STM
and LDM
instructions
and can therefore be expressed using the STM
and LDM
instructions.
Some forms of PUSH
and POP
are
also 16-bit instructions.
Loading to the PC
A load to the PC causes a branch to the instruction at the address loaded.
Also:
- Bits[1:0] must not be 0b10.
- If bit[0] is 1, execution continues in T32 state.
- If bit[0] is 0, execution continues in A32 state.
Loading or storing the base register, with writeback
In A32 or 16-bit T32 instructions, if Rn
is in reglist
, and writeback
is specified with the ! suffix:
- If the instruction is
STM{
andaddr_mode
}{cond
}Rn
is the lowest-numbered register inreglist
, the initial value ofRn
is stored. These instructions are deprecated. - Otherwise, the loaded or stored value of
R
cannot be relied on, so these instructions are not permitted.n
32-bit T32 instructions are not permitted if Rn
is in reglist
,
and writeback is specified with the !
suffix.
Correct example
LDM r8,{r0,r2,r9} ; LDMIA is a synonym for LDM
Incorrect example
LDMDA r2, {} ; must be at least one register in list