SXTAH
Sign extend Halfword with Add, to extend a 16-bit value to a 32-bit value.
Syntax
SXTAH
{
}
{cond
}, Rd
,
Rn
{,Rm
}
rotation
where:
cond
is an optional condition code.
Rd
is the destination register.
Rn
is the register holding the number to add.
Rm
is the register holding the value to extend.
rotation
is one of:
ROR #8
Value from
is rotated right 8 bits.Rm
ROR #16
Value from
is rotated right 16 bits.Rm
ROR #24
Value from
is rotated right 24 bits.Rm
If
is omitted, no rotation is performed.rotation
Operation
This instruction does the following:
Rotate the value from
right by 0, 8, 16 or 24 bits.Rm
Extract bits[15:0] from the value obtained.
Sign extend to 32 bits.
Add the value from
.Rn
Register restrictions
You cannot use PC for any operand.
You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.
Condition flags
This instruction does not change the flags.
Availability
The 32-bit instruction is available in A32 and T32.
For the ARMv7-M architecture, the 32-bit T32 instruction is only available in an ARMv7E-M implementation.
There is no 16-bit version of this instruction in T32.