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Atomic exclusive OR on halfword in memory, without return.


STEORH Ws, [Xn|SP] ; No memory ordering general registers

STEORLH Ws, [Xn|SP] ; Release general registers


Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location.
Is the 64-bit name of the general-purpose base register or stack pointer.

Architectures supported

Supported in ARMv8.1 and later.


Atomic exclusive OR on halfword in memory, without return, atomically loads a 16-bit halfword from memory, performs an exclusive OR with the value held in a register on it, and stores the result back to memory.

  • STEORH has no memory ordering semantics.
  • STEORLH stores to memory with release semantics, as described in Load-Acquire, Store-Release.

For information about memory accesses see Load/Store addressing modes in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.