CRC32CB, CRC32CH, CRC32CW, CRC32CX
CRC32C checksum performs a cyclic redundancy check (CRC) calculation on a value held in a general-purpose register.
Wm ; Wd = CRC32C(Wn, Rm[<7:0>])
Wm ; Wd = CRC32C(Wn, Rm[<15:0>])
Wm ; Wd = CRC32C(Wn, Rm[<31:0>])
Xm ; Wd = CRC32C(Wn, Rm[<63:0>])
- Is the 32-bit name of the general-purpose data source register.
- Is the 64-bit name of the general-purpose data source register.
- Is the 32-bit name of the general-purpose accumulator output register.
- Is the 32-bit name of the general-purpose accumulator input register.
This instruction takes an input CRC value in the first source operand, performs a CRC on the input value in the second source operand, and returns the output CRC value. The second source operand can be 8, 16, 32, or 64 bits. To align with common usage, the bit order of the values is reversed as part of the operation, and the polynomial
0x1EDC6F41 is used for the CRC calculation.
NoteID_AA64ISAR0_EL1.CRC32 indicates whether this instruction is supported. See ID_AA64ISAR0_EL1 in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.
Wd = CRC32C(Wn, Rm<n:0>) // n = 7, 15, 31, 63.
Supported in architecture ARMv8.1 and later. Optionally supported in ARMv8-A.