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ORN (vector)
Bitwise inclusive OR NOT (vector).
Syntax
ORN
Vd.T, Vn.T, Vm.T
Where:
Vd- Is the name of the SIMD and FP destination register.
T-
Is an arrangement specifier, and can be either
8Bor16B. Vn- Is the name of the first SIMD and FP source register.
Vm- Is the name of the second SIMD and FP source register.
Usage
Bitwise inclusive OR NOT (vector). This instruction performs a bitwise OR NOT between the two source SIMD and FP registers, and writes the result to the destination SIMD and FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.