VCLE (register)
Vector Compare Less than or Equal pseudo-instruction.
Syntax
VCLE
{
}.cond
{datatype
}, Qd
,
Qn
Qm
VCLE
{
}.cond
{datatype
}, Dd
,
Dn
Dm
where:
cond
is an optional condition code.
datatype
must be one of
S8
,S16
,S32
,U8
,U16
,U32
, orF32
.The result datatype is:
I32
for operand datatypesS32
,U32
, orF32
.I16
for operand datatypesS16
orU16
.I8
for operand datatypesS8
orU8
.
Qd, Qn, Qm
specifies the destination register, the first operand register, and the second operand register, for a quadword operation.
Dd, Dn, Dm
specifies the destination register, the first operand register, and the second operand register, for a doubleword operation.
Operation
VCLE
takes the value of each element in a vector, and compares it with the
value of the corresponding element of a second vector. If the condition is true, the
corresponding element in the destination vector is set to all ones. Otherwise, it is set to
all zeros.
On disassembly, this pseudo-instruction is disassembled to the corresponding
VCGE
instruction, with the operands reversed.