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VMOV (between an ARM register and half a double precision floating-point register)

Transfer contents between an ARM register and half a double precision floating-point register.

Syntax

VMOV{cond}{.size} Dn[x], Rd

VMOV{cond}{.size} Rd, Dn[x]

where:

cond

is an optional condition code.

size

the data size. Must be either 32 or omitted. If omitted, size is 32.

Dn[x]

is the upper or lower half of a double precision floating-point register.

Rd

is the ARM register. Rd must not be PC.

Operation

VMOV Dn[x], Rd transfers the contents of Rd into Dn[x].

VMOV Rd, Dn[x] transfers the contents of Dn[x] into Rd.

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