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QDADD

Signed saturating Double and Add.

Syntax

QDADD{cond} {Rd}, Rm, Rn

where:

cond

is an optional condition code.

Rd

is the destination register.

Rm, Rn

are the general-purpose registers holding the operands.

Operation

QDADD calculates SAT(Rm + SAT(Rn * 2)). It saturates the result to the signed range -231x ≤ 231-1. Saturation can occur on the doubling operation, on the addition, or on both. If saturation occurs on the doubling but not on the addition, the Q flag is set but the final result is unsaturated.

Note

All values are treated as two’s complement signed integers by this instruction.

Register restrictions

You cannot use PC for any operand.

You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.

Q flag

If saturation occurs, this instruction sets the Q flag. To read the state of the Q flag, use an MRS instruction.

Availability

The 32-bit instruction is available in A32 and T32.

For the Armv7‑M architecture, the 32-bit T32 instruction is only available in an Arm®v7E-M implementation.

There is no 16-bit version of this instruction in T32.

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