Store Register Halfword (register).
- Is the 32-bit name of the general-purpose register to be transferred.
- Is the 64-bit name of the general-purpose base register or stack pointer.
- When "option<0>" is set to 0, is the 32-bit name of the general-purpose index register.
- When "option<0>" is set to 1, is the 64-bit name of the general-purpose index register.
Is the index extend/shift specifier, defaulting to LSL, and which must be omitted for the LSL option when
amountis omitted, and can be one of
Is the index shift amount, optional only when
extendis not LSL. Where it is permitted to be optional, it defaults to #0. It is, and can be either
Store Register Halfword (register) calculates an address from a base register value and an offset register value, and stores a halfword from a 32-bit register to the calculated address. For information about memory accesses, see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.
The instruction uses an offset addressing mode, that calculates the address used for the memory access from a base register value and an offset register value. The offset can be optionally shifted and extended.