Atomic signed minimum on halfword in memory, without return.
Xn|SP] ; No memory ordering general registers
Xn|SP] ; Release general registers
- Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location.
- Is the 64-bit name of the general-purpose base register or stack pointer.
Supported in the Arm®v8.1 architecture and later.
Atomic signed minimum on halfword in memory, without return, atomically loads a 16-bit halfword from memory, compares it against the value held in a register, and stores the smaller value back to memory, treating the values as signed numbers.
STSMINHhas no memory ordering semantics.
STSMINLHstores to memory with release semantics, as described in Load-Acquire, Store-Release.
For information about memory accesses see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.