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VMLS (floating-point)
Floating-point multiply subtract.
Syntax
VMLS
{
}cond
.F32
, Sd
,
Sn
Sm
VMLS
{
}cond
.F64
, Dd
,
Dn
Dm
where:
cond
is an optional condition code.
Sd
,Sn
,Sm
are the single-precision registers for the result and operands.
Dd
,Dn
,Dm
are the double-precision registers for the result and operands.
Operation
The VMLS
instruction multiplies
the values in the operand registers, subtracts the result from the value
in the destination register, and places the final result in the
destination register.
Floating-point exceptions
This instruction can produce Invalid Operation, Overflow, Underflow, Inexact, or Input Denormal exceptions.