Linker reordering of execution regions containing T32 code
The linker reorders execution regions containing T32 code only if the size of the T32 code exceeds the branch range.
If the code size of an execution region exceeds the maximum branch range of a T32 instruction, then armlink reorders the input sections using a different sorting algorithm. This sorting algorithm attempts to minimize the amount of veneers generated.
The T32 branch instructions that can be veneered are always encoded as a pair of 16-bit instructions. Processors that support Thumb-2 technology have a range of 16MB. Processors that do not support Thumb-2 technology have a range of 4MB.
To disable section reordering, use the