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Hyp mode TLB maintenance operations

The following table shows the System instructions for TLB maintenance operations added for Virtualization in AArch32 state. See the ARM® Architecture Reference Manual ARMv8 for more information about these operations.

Table 4-113 Hyp mode TLB maintenance operations

Name CRn op1 CRm op2 Description
TLBIIPAS2IS c8 4 c0 1 TLB Invalidate entry by Intermediate Physical Address, Stage 2, Inner Shareable
TLBIIPAS2LIS     5 TLB Invalidate entry by Intermediate Physical Address, Stage 2, Last level, Inner Shareable
TLBIALLHIS     c3 0 Invalidate entire Hyp unified TLB Inner Shareable
TLBIMVAHIS     1 Invalidate Hyp unified TLB by VA Inner Shareable
TLBIALLNSNHIS     4 Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable
TLBIMVALHIS     5 Invalidate Unified Hyp TLB entry by VA Inner Shareable, Last level
TLBIIPAS2     c4 1 TLB Invalidate entry by Intermediate Physical Address, Stage 2
TLBIIPAS2L     5 TLB Invalidate entry by Intermediate Physical Address, Stage 2, Last level
TLBIALLH c8 4 c7 0 Invalidate entire Hyp unified TLB
TLBIMVAH     1 Invalidate Hyp unified TLB by VA
TLBIALLNSNH     4 Invalidate entire Non-secure Non-Hyp unified TLB
TLBIMVALH     5 Invalidate Unified Hyp TLB entry by VA, Last level
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