You copied the Doc URL to your clipboard.

ARM Cortex-A72 MPCore Processor Technical Reference Manual : Virtualization Multiprocessor ID Register

Virtualization Multiprocessor ID Register

The VMPIDR characteristics are:

Purpose
Holds the value of the Virtualization Multiprocessor ID. This is the value returned by Non-secure EL1 reads of MPIDR. .
Usage constraints

The accessibility to the VMPIDR in AArch32 state by Exception level is:

EL0 EL1(NS) EL1(S) EL2 EL3(SCR.NS = 1) EL3(SCR.NS = 0)
- - - RW RW -
Configurations

The VMPIDR is:

  • A Banked EL2 register.
  • Architecturally mapped to the AArch64 VMPIDR_EL2 register.
Attributes
See the register summary in Table 4-84 c0 register summary.

The following figure shows the VMPIDR bit assignments.

Figure 4-81 VMPIDR bit assignments


The following table shows the VMPIDR bit assignments.

Table 4-117 VMPIDR bit assignments

Bits Name Function
[31:0] VMPIDR MPIDR value returned by Non-secure EL1 reads of the MPIDR. For information on the subdivision of this value, see  Multiprocessor Affinity Register.

To access the VMPIDR, read or write the CP15 register with:

MRC p15, 4, <Rt>, c0, c0, 5; Read Virtualization Multiprocessor ID Register
MCR p15, 4, <Rt>, c0, c0, 5; Write Virtualization Multiprocessor ID Register