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ARM Cortex-A72 MPCore Processor Technical Reference Manual : c13 registers

c13 registers

The following table shows the System registers when CRn is c13 and the processor is in AArch32 state.

Table 4-96 c13 register summary

op1 CRm op2 Name Type Reset Description
0 c0 0 FCSEIDR RW 0x00000000 FCSE Process ID Register
  1 CONTEXTIDR RW UNK Context ID Register 
  2 TPIDRURW RW UNK User Read/Write Thread Pointer ID Register a
  3 TPIDRURO RW b UNK User Read-Only Thread Pointer ID Register a
  4 TPIDRPRW RW UNK EL1 only Thread Pointer ID Register a
4 c0 2 HTPIDR RW UNK Hyp Thread Pointer ID Register a
a See the ARM® Architecture Reference Manual ARMv8 for more information.
b RO at EL0.