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ARM Cortex-A72 MPCore Processor Technical Reference Manual : Clearing the clear-after-read EDPRSR bits when Core power domain is on, and DoubleLockStatus() is TRUE

Clearing the clear-after-read EDPRSR bits when Core power domain is on, and DoubleLockStatus() is TRUE

The processor implements the preferred behavior, that is:

  • Bits are not cleared to zero.
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