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ARM Cortex-A72 MPCore Processor Technical Reference Manual : Documentation


The Cortex-A72 processor documentation is as follows:

Technical Reference Manual
The Technical Reference Manual (TRM) describes the functionality and the effects of functional options on the behavior of the processor. It is required at all stages of the design flow. The choices made in the design flow can mean that some behavior described in the TRM is not relevant. If you are programming the multiprocessor, additional information must be obtained from:
  • The implementer to determine the build configuration of the implementation.
  • The integrator to determine the pin configuration of the device that you are using.


  • The out-of-order design of the Cortex-A72 processor pipeline makes it impossible to provide accurate timing information for complex instructions. The timing of an instruction can be affected by factors such as:

    • Other concurrent instructions.
    • Memory system activity.
    • Events outside the instruction flow.
  • Timing information has been provided in the past for some ARM processors to assist in the hand tuning of performance critical code sequences or in the development of an instruction scheduler within a compiler. This timing information is not required for producing optimized instruction sequences on the Cortex-A72 processor. The out-of-order pipeline of the processor can schedule and execute the instructions in an optimal fashion without any instruction reordering required.
Configuration and Sign-off Guide

The Configuration and Sign-off Guide (CSG) describes:

  • The available build configuration options and related issues in selecting them.
  • How to configure the Register Transfer Level (RTL) source files with the build configuration options.
  • How to integrate RAM arrays.
  • How to run test vectors.
  • The processes to sign off the configured design.

The ARM product deliverables include reference scripts and information about using them to implement your design. Reference methodology flows supplied by ARM are example reference implementations. For EDA tool support, contact your EDA vendor.

The CSG is a confidential book that is only available to licensees.

Integration Manual

The Integration Manual (IM) describes how to integrate the processor into an SoC. It describes the signals that the integrator must tie off to configure the macrocell for the required integration. Some of the implementation options might affect which integration options are available.

The IM is a confidential book that is only available to licensees.

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