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ARM Cortex-A72 MPCore Processor Technical Reference Manual : External aborts

External aborts

External memory errors are defined as those that occur in the memory system rather than those that the MMU detects.

External memory errors are extremely rare. External errors are caused by errors flagged by the AXI interfaces or generated because of an uncorrected ECC error in the L1 data cache or L2 cache arrays when the request is external to the Cortex-A72 MPCore processor. You can configure external aborts to trap to Monitor mode by setting the EA bit in the Secure Configuration Register to 1.

This section contains the following subsections:

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