TPIU functional description
The TPIU is available in a configuration that supports ITM debug trace, and a configuration that supports both ITM and ETM debug trace. If your implementation requires no trace support then the TPIU might not be present.
NoteIf your Cortex®‑M4 system uses the optional ETM component, the TPIU configuration supports both ITM and ETM debug trace. See the ETM-M4 Technical Reference Manual.
This section contains the following subsections: