You copied the Doc URL to your clipboard.

Arm Cortex‑M1 DesignStart FPGA-Xilinx edition User Guide : Chapter 3 Cortex‑M1 processor IP configuration

Chapter 3 Cortex®‑M1 processor IP configuration

After installing the Arm IP Integrator (IPI) repository, you can find the Cortex®‑M1 processor package in the Vivado IP catalog. This package is a version of Cortex‑M1 r1p0 processor with debug and the BP136 AHB to AXI bridge r0p1 pre-integrated.

See the Cortex®‑M1 Technical Reference Manual for a detailed description of the processor.

This chapter describes the four Cortex‑M1 processor IP configuration tabs, each with details on individual configuration categories.


  • For more information about the Cortex‑M1 processor configuration options, see, the Configurable options section in the Cortex®‑M1 Technical Reference Manual.
  • For more information on the BP136 AHB to AXI bridge, see the PrimeCell® Infrastructure AMBA®2 AHB to AMBA®3 AXI Bridges (BP136) Technical Overview. This document is superseded, indicating that the documentation is no longer maintained, but the current content is still relevant.

It contains the following sections:

Was this page helpful? Yes No