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Arm Cortex‑M1 DesignStart FPGA-Xilinx edition User Guide : Configuration tab

Configuration tab

The following figure shows the configuration tab.

Figure 3-1 Configuration tab

Configuration tab

In this tab, you can select the following:

Number of interrupts

This indicates the number of interrupt sources the Cortex®‑M1 processor supports. There are four fixed values, 1, 8, 16, or 32.

Note

  • The IRQ port width remains constant at 32 bits. Unused higher order bits are tied LOW in synthesis. If less than 32 interrupts are configured, you must ensure that any active interrupts are in the active lower order bits.
OS Extensions
Enable OS extensions if the Cortex‑M1 processor is defined to include the Nested Vectored Interrupt Controller (NVIC) and Core OS extensions such as SVC and SysTick.
Small Multiplier
Enable Small Multiplier if the Cortex‑M1 processor is to use a small but slower multiplier for fabrics that do not have dedicated multiplier resources.
Big Endian
Enable Big Endian if the Cortex‑M1 processor is defined to have BE8 big-endian byte ordering.

Note

The example design provided only supports little-endian, but you can choose the Big Endian option if you are using the Cortex‑M1 processor in any other system.
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