Generating the Arty A7 board support package
Before compiling the example software design that you are provided, a Board Support Package (BSP) is created using the Vivado Software Development Kit (SDK). The example software design includes files and directories that the BSP creates.
To generate a Cortex®‑M1 BSP for the Arty Artix 7 (A7) board:
- Open Vivado.
Open the design found in
- If the original design has been modified, including changing the address map, then proceed and follow steps 4 and 5. If the hardware design is unchanged, proceed to step 6.
- Select Generate Block Diagram from the left-hand side pane and then select Generate. This directs Vivado to generate the file required files for synthesis, implementation, and simulation for the block diagram.
Select File → Export Hardware. Set the Exported location to
V:/Software. The dialog box that opens prompts that an exported module for the file is already found. Click Yes to overwrite this file.
Figure 6-1 Export Hardware
Select File → Launch SDK. Set Exported location to V:/software and workspace to
V:/software/m1_for_arty_a7/sdk_workspace. Click OK to proceed.
Figure 6-2 Launch SDK
Vivado SDK launches and automatically opens the hardware platform specification for the Arty A7 example design. The following image shows the memory map that is displayed. The memory map displayed aligns with the map described in Memory map.
- Confirm that under Xilinx → Repositories, the global repository list includes V:/vivado/Arm_sw_respository.
- Select File → New → Board Support Package.
Set the design name to
Figure 6-4 New Board Support Package Project
On the next screen, change the default OS version from 6.7 to 6.6. Additionally, on the Standalone tab, ensure that stdin and stdout are set to use axi_uartlite_0.
CautionThe SDK does not read the
stdoutvalues unless they are changed. This is a known issue, and therefore, you must set
none, and then set them back to
Figure 6-5 Board Support Package Settings - Overview tab
Figure 6-6 Board Support Package Settings - standalone tab
- Click Finish. The SDK generates the required BSP files.
- On the next screen, change the default OS version from 6.7 to 6.6. Additionally, on the Standalone tab, ensure that stdin and stdout are set to use axi_uartlite_0.
The following directory structure now exists as
V:/software/m1_for_arty_a7/sdk_workspace/standalone_bsp_0/CORTEX_M1_0/. The common Xilinx include files are in the
/includedirectory. The driver files for the selected peripherals and the standalone BSP core files are in the
xpseudo_asm_rcvt.cfiles must be manually copied from
V:/software/m1_for_arty_a7/sdk_workspace/standalone_bsp_0/CORTEX_M1_0/includedirectory because of differences between the Vivado SDK and Arm Keil Microcontroller Development Kit (MDK).
NoteThe BSP header file,
xparameters.h, is located in the
V:\software\sdk_workspace\m1_for_arty_a7\standalone_bsp_0\CORTEX_M1_0\include. This header file includes definitions for all memory addresses and peripheral configurations. It is automatically generated from the hardware platform specification. To enable tightly coupled hardware and software configurations Arm recommends that you use the configuration definitions from this file.
xparameters.hfile does not contain entries for STDIN_BASEADDRESS or STDOUT_BASEADDRESS, then the
stdoutlocations are not correctly set. This results in no UART output. The
standalone_bsp_0directory should be removed, and the BSP regenerated.