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Arm Cortex‑M1 DesignStart FPGA-Xilinx edition User Guide : Downloading QSPI memory models

Downloading QSPI memory models

If you want to simulate the example design, then the testbench can also simulate the Quad Serial Port Interface (QSPI) devices that are fitted to the Arty Artix 7 (A7) baseboard (a Micron device) and the V2C-DAPLink board (a Cypress device).



It is only necessary to download the QSPI memory models if you want to simulate the example design when you are operating on the Arty A7 board, and optionally, with the V2C-DAPLink board fitted. If you do not want to simulate the design, you can ignore this section.


If you do not download the QSPI memory models, then you get warnings every time you open the Vivado project. The following figure shows these warnings. If you do not intend to simulate the QSPI models, then these warnings can be ignored.

Figure 2-4 Critical warning messages

You must complete the steps in:

  • To simulate the QSPI devices that are fitted, you must download the appropriate models from Micron and Cypress websites.
  • When the QSPI memory models are correctly installed, you can enable using the Verilog define at the top of V:/testbench/tb_m1_for_arty.v.
If the V2C-DAPLink board is fitted and QSPI device models included, then code execution is from the QSPI device on the V2C-DAPLink board.

Next Steps

You must first refer to the information in either of the following depending on the QSPI model that you choose to install: After you have downloaded and installed the required QSPI model, you must proceed to Configuring simulation in Vivado.
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