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Arm Cortex‑M1 DesignStart FPGA-Xilinx edition User Guide : V2C-DAPLink configuration

V2C-DAPLink configuration

The V2C-DAPLink board has a configuration jumper, J2. This is used to drive a detect signal to the example design, and has the following effects when used with the example design.

Jumper open

The processor boots from the Instruction Tightly Coupled Memory (ITCM) lower alias. The ITCM initialization is performed as part of FPGA programming on powerup. A debugger sees the ITCM at both 0x00000000 and 0x10000000. The QSPI on the V2C-DAPLink can be written or accessed using the normal mode peripheral at 0x40020000. The UART connection to the V2C-DAPLink is unused in this configuration.

Jumper closed

The processor boots from Quad Serial Peripheral Interface (QSPI) eXecute In Place (XIP). The upper ITCM alias at 0x10000000 is still initialized at FPGA powerup, but is available for application use. Breakpoints cannot be placed directly in the QSPI image. There is no built-in process to copy any code from the QSPI XIP region into ITCM.

The UART connection to the V2C-DAPLink is connected to the example design UART in this configuration.


For more information on the memory map, see Memory map.
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