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TCU tie-off signals

The TCU tie-off signals are sampled between exiting reset and the LPI_PD interface first entering the Q_RUN state. Ensure that the value of these signals does not change when the LPI_PD interface is in the Q_STOPPED or Q_EXIT state for the first time after exiting reset.

The following table shows the TCU tie-off signals.

Table A-10 TCU tie-off signals






This signal indicates whether the QTW interface is I/O-coherent. Tie HIGH when the TCU is connected to a coherent interconnect.



This signal indicates whether the Broadcast TLB Maintenance is supported. Tie HIGH when the TCU is connected to an interconnect that supports DVM.



This signal indicates whether the Send Event mechanism is supported. Tie HIGH when evento is connected.



Output address size supported.

The encodings for this input are:

0b00032 bits.
0b00136 bits.
0b01040 bits.
0b01142 bits.
0b10044 bits.
0b10148 bits.

You must not use other encodings, including 0b110 that SMMUv3.1 defines to indicate 52-bit addresses. They are treated as 0b101.

sec_override Input When HIGH, certain registers are accessible to Non-secure accesses from reset, as the TCU_SCR register settings describe.
ecorevnum[3:0] Input Tie this signal to 0 unless directed otherwise by Arm.

See the Arm® System Memory Management Unit Architecture Specification, SMMU architecture version 3.0 for more information about the SMMUv3 ID signals.

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