Distributor AXI4-Stream interfaces
The GIC-600 uses AXI4-Stream interfaces to communicate between blocks.
These interfaces are fully credited, therefore they never exert anything other than transient backpressure on their ic<xy>dtready signals. This enables packets to be routed over any available free-flowing interconnect.
- ic<xy> can be cd, pd, id, dp, di.
- Packets must not be reordered between endpoints, for example, between the Distributor and a single Redistributor block, irrespective of the interconnect that is used. Packets must never be interleaved.
For information about AXI4-Stream signals, see the ARM® AMBA® 4 AXI4-Stream Protocol Specification.
The following table lists the AXI4-Stream input interfaces.
Table 2-1 AXI4-Stream input interface descriptions
|ICID||ITS to Distributor||16-bit or 64-bit||ITS number|
|ICPD||Redistributor to Distributor||16-bit, 32-bit, or 64-bit||Redistributor number|
|ICCD||SPI Collator to Distributor||16-bit||0|
The following table lists the AXI4-Stream output interfaces.
Table 2-2 AXI4-Stream output interface descriptions
|ICDI||Distributor to ITS||16-bit or 64-bit||ITS number|
|ICDP||Distributor to Redistributor||16-bit, 32-bit, or 64-bit||Redistributor number|
|ICDC||Distributor to SPI Collator||16-bit||0|
|ICDW||Distributor to Wake Request block||16-bit||-|
Each bus has an associated ic<xy>twakeup signal that requests wakeup through the qactive signals when the Distributor, or destination block, is hierarchically clock-gated through the Q-Channel. The ic<xy>twakeup input signal must be driven from a cleanly registered version of the ic<xy>dtvalid signal to prevent spurious wakeups caused by signal glitches.
To ease integration, an arbitrary set of these stream interfaces can be combined into a single port. In this case, an ic<xy>dtdest value for the inputs and an ic<xy>dtid for the outputs is assigned with a number that increments in the same order as the rows shown in the interface description tables.