MSI-64 ACE-Lite interfaces
The MSI-64 Encapsulator has an ACE-Lite slave interface and an ACE-Lite master interface.
- MSI-64 ACE-Lite slave interface with awdeviceid
- This interface is a full ACE-Lite slave port with an extra awdeviceid input signal, which is valid, and must remain stable with awvalid.
- MSI-64 ACE-Lite master interface
- This interface is a full ACE-Lite master port.
The following table shows the transaction acceptance capabilities of both slave and master ports.
Table 2-13 Transaction acceptance
|Transaction type||Maximum number of transactions allowed|
Any leading wdata is registered and held until the awaddr signal arrives. These signals are described in A.5 ACE interface signals.
- The MSI-64 Encapsulator requires a data bus that has a width of 64 bits or greater.
- The ACE-Lite master port never issues more than two addresses before signal wlast is asserted.