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Arm CoreLink GIC-600 Generic Interrupt Controller Technical Reference Manual : Interrupt signals

Interrupt signals

The following table shows the GIC-600 interrupt signal set.

Table A-3 Interrupt signals

Signal name Type Source or destination Description
ppi<n><[_<ppi_block>][_<bus>][_<num_cpus − 1:0>] Input Interrupt source

PPI input wires for interrupt <n>. One bit per core.

n is 16-31 if the number of PPIs per core is 16.

n is 20-31 if the number of PPIs per core is 12.

n is 22-27, 29, 30 if number of PPIs per core is 8.

ppi<n>_r_[_<ppi_block>][_<bus>] Output Interrupt source PPI output after synchronization and edge detection. You can use it for cross-domain pulse detection.
spi[variable:0] Input Interrupt source

This is the number of SPI wires that are supported by the GIC.

Note

This is not the same as the number of SPIs supported because they could be message-based only or be on another chip.
spi_r[variable:0] Output Interrupt source SPI output after synchronization and edge detection. Can be used for cross-domain pulse detection.
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