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Locality-specific Peripheral Interrupts (LPIs) are always message-based, and can be from a peripheral, or from a PCIe root complex.

An LPI targets only one core. LPIs are generated when the peripheral writes to the ITS. The ITS contains the registers to control the generation and maintenance of LPIs. The ITS provides INTID translation, allowing peripherals to be owned directly by a virtual machine if an SMMU is also present for those peripherals.


  • The ITS enables interrupts to be translated to the ID space of the hypervisor instead of directly to a virtual machine.
  • Instead of using an ITS, registers can be used to configure the GIC-600 to generate and control LPIs. For more information, see GICR_SETLPIR register in the Arm® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0.
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