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The MSI-64 Encapsulator can be used to combine the DeviceID into single memory access writes to the GITS_TRANSLATER register in the ITS.

The ITS translates DeviceID/EventID pairs into LPI physical INTIDs.

A normal MSI/MSI64 write contains the EventID in the lower 16 bits or 32 bits of data. However, the DeviceID must be transported using a different method. The DeviceID is often derived directly from a PCIe RequestorID or System Memory Management Unit (SMMU) StreamID.

The GIC-600 ITS supports two mechanisms:

The DeviceID arrives on sideband user signals. You must ensure that rogue software cannot directly or indirectly, perform an access to the GITS_TRANSLATER register with a DeviceID that matches a real device.
When configured to support MSI-64, the ITS expects the DeviceID to be in the upper 32 bits of a 64-bit write to the GITS_TRANSLATER register.
To prevent rogue software accessing the GITS_TRANSLATER register and spoofing any device, Arm recommends that the GITS_TRANSLATER register is moved to an arbitrary page that is protected by the Hypervisor.
The GIC-600 uses two methods to support this:
  • The MSI-64 Encapsulator modifies the page address of accesses to the architectural GITS_TRANSLATER address, set by the msi_translator_page tie-off, to the system-defined page set by msi64_translator_page.
  • When the ITS shares an ACE-Lite slave port, a separate page address tie-off gits_transr_page_offset, allows the GITS_TRANSLATER register page to be moved to anywhere in the address map to match the msi64_translator_page value that is independent of the GICD address map reset.


    The msi64_translator_page and its_transr_page_offset, or one of either, must not be on top of any other GIC register page.

    To ensure that this method of mapping is hidden from software, all accesses to the GITS_TRANSLATER register must pass through an Encapsulator, or similar embedded functionality. See MSI-64 Encapsulator for more information about the MSI-64 Encapsulator.

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