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LPIs and the ITS

The GIC-600 uses the value of GICR_TYPER.ProcessorNumber to route all LPIs and commands to their targets.

The GIC-600 does not use physical target addresses, therefore GITS_TYPER.PTA == 0.

The GIC-600 divides the ProcessorNumber value into two fields, Chip_ID, and Padded linear on-chip core number.

The width of the padded on-chip core number is defined by the max_pe_on_chip configuration parameter. This parameter sets the maximum number of cores on a single chip in the configuration. The width of the linear on-chip core number field is discoverable through GICD_CFGID.PEW.

For example, if max_pe_on_chip = 17, the width of the lower part of the on-chip core number field is ceiling[log2(17)] = 5. Therefore, the ProcessorNumber value of the first core on chip 1 is 0x20, the value of the second core on chip 1 is 0x21, the value of the first core on chip 2 is 0x40.

The following figure shows the ProcessorNumber fields with typical values.

Figure 3-3 ProcessorNumber fields

If software attempts to access a chip that does not exist, is offline, or access a core that does not exist, the request is dropped and reported through the ITS command and translation error records 13+.

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