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Function Control Register, GICD_FCTLR

This register controls the scrubbing of all RAMs in the local Distributor. The register is not distributed and only acts on the local chip.

The GICD_FCTLR characteristics are:

Usage constraintsThere are no usage constraints.
ConfigurationsAvailable in all GIC-600 configurations.
AttributesSee Distributor registers (GICD/GICDA) summary.

The following figure shows the bit assignments.

Figure 4-4 GICD_FCTLR bit assignments

The following table shows the bit assignments.

Table 4-6 GICD_FCTLR bit assignments

Bits Name Function
[31:29] - Reserved, returns 0b00000.
[28:27] -



[26] POS

Point Of Serialization.

When an interrupt is sent remotely and POS is set, it ensures that writes to GICD_SETSPI and GICD_CLRSPI propagate to remote chips before ACE-Lite sends a response. Applies only to edge-triggered interrupts.

1 = Propagate access to POS.

0 = Store locally and propagate when possible.

Resets to 0b0.

[25] QDENY

Q-Channel Deny.

Overrides the Q-Channel logic and forces the Distributor to reject powerdown requests.

[24:22] -



[21] DCC

Do not Correct Cache.

Modifies a<x>cache outputs from the Distributor.

See Memory access and attributes.

[20:19] -



[18] -


[17:16] NSACR

Non-secure Access Control. Values are as described in the GICD_NSACR register. This is the value that is used if a SPI has an error.

Secure access only.

Resets to 0b00.
[15:14] - Reserved, returns 0b00.
[13:4] CGO

One bit per clock gate:

1 = Leave clock running.

0 = Use full clock gating.

Clock gate bit assignments are specified in Table   4-7 CGO field bit assignments.


CGO must be set if clock gates are not implemented.
[3:1] - Reserved, returns 0b000.
[0] SIP

Scrub in progress:

1 = Scrub in progress.

0 = No scrub in progress.

This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0.

Table 4-7 CGO field bit assignments

Value Clock gate
0x0 CPU communications block
0x1 SPI registers and search
0x2 ACE-Lite slave interface
0x3 ACE-Lite master interface
0x4 LPI cache and search
0x5 SGI and GICR registers
0x6 Trace & debug
0x7 Pending table search and control
0x8 ITS communications block
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