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ITS control register summary
The GIC-600 Interrupt Translation Service functions are controlled through registers that are identified with the prefix GITS.
For descriptions of registers that are not specific to the GIC-600, see the Arm® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0.
Note
This page does not exist in GIC-600 configurations that do not support LPIs or that do not have an ITS.Table 4-35 ITS control register summary
Offset | Name | Type | Width | Reset | Description | Architecture defined? |
---|---|---|---|---|---|---|
0x0000 |
GITS_CTLR | RW | 32 | 0x80000000 |
ITS Control Register | Yes |
0x0004 |
GITS_IIDR | RO | 32 | Configuration dependent | ITS Implementer Identification Register, GITS_IIDR | Yes |
0x0008 |
GITS_TYPER | RO | 64 | Configuration dependent | Interrupt Controller Type Register, GITS_TYPER | Yes |
0x0010 -0x001C |
- | - | 32 | - | Reserved | - |
0x0020 |
GITS_FCTLR | RW | 32 | 0x0 |
Function Control Register, GITS_FCTLR | a |
0x0024 |
- | - | - | - | Reserved | - |
0x0028 |
GITS_OPR | RW | 64 | 0x0 |
Operations Register, GITS_OPR | a |
0x0030 |
GITS_OPSR | RO | 64 | 0x0 |
Operation Status Register, GITS_OPSR | a |
0x0038 -0x007C |
- | - | - | - | Reserved | - |
0x0080 |
GITS_CBASER | RW | 64 | 0x0 |
Command Queue Control Register See the Arm® GICv3 and GICv4 Software Overview |
Yes |
0x0088 |
GITS_CWRITER | RW | 64 | 0x0 |
Command Queue Write Pointer Register | Yes |
0x0090 |
GITS_CREADR | RO | 64 | 0x0 |
Command Queue Read Pointer Register | Yes |
0x0098 -0x00FC |
- | - | - | - | Reserved | - |
0x0100 |
GITS_BASER0 | RW | 64 | 0x107000000000000 |
ITS Translation Table Descriptor Register0 | Yes |
0x0108 |
GITS_BASER1 | RW | 64 | 0x0 |
ITS Translation Table Descriptor Register1 | Yes |
0x0110 -0xEFFC |
- | - | - | - | Reserved | - |
0xF000 |
GITS_CFGID | RO | 32 | 0x0 |
Configuration ID Register, GITS_CFGID | a |
0xF004 -0xFFCC |
- | - | - | - | Reserved | - |
0xFFD0 |
GITS_PIDR4 | RO | 32 | 0x44 |
Peripheral ID 4 Register | No |
0xFFD4 |
GITS_PIDR5 | RO | 32 | 0x00 |
Peripheral ID 5 Register | No |
0xFFD8 |
GITS_PIDR6 | RO | 32 | 0x00 |
Peripheral ID 6 Register | No |
0xFFDC |
GITS_PIDR7 | RO | 32 | 0x00 |
Peripheral ID 7 Register | No |
0xFFE0 |
GITS_PIDR0 | RO | 32 | 0x94 |
Peripheral ID 0 Register | No |
0xFFE4 |
GITS_PIDR1 | RO | 32 | 0xB4 |
Peripheral ID 1 Register | No |
0xFFE8 |
GITS_PIDR2 | RO | 32 | 0x3B |
Peripheral ID2 Register, GITS_PIDR2 | No |
0xFFEC |
GITS_PIDR3 | RO | 32 | 0x00 |
Peripheral ID 3 Register | No |
0xFFF0 |
GITS_CIDR0 | RO | 32 | 0x0D |
Component ID 0 Register | No |
0xFFF4 |
GITS_CIDR1 | RO | 32 | 0xF0 |
Component ID 1 Register | No |
0xFFF8 |
GITS_CIDR2 | RO | 32 | 0x05 |
Component ID 2 Register | No |
0xFFFC |
GITS_CIDR3 | RO | 32 | 0xB1 |
Component ID 3 Register | No |
This section contains the following subsections: