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Redistributor registers for SGIs and PPIs summary

The functions for the GIC-600 SGIs and PPIs are controlled through the Redistributor registers identified with the prefix GICR.

For descriptions of registers that are not specific to the GIC-600, see the Arm^® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0.

Table 4-29 Redistributor registers for SGIs and PPIs summary

Offset	Name	Type	Width	Reset	Description	Architecture defined?
`0x0000`-`0x007C`	-	-	-	-	Reserved	-
`0x0080`	GICR_IGROUPR0	RW	32	`0x0`	Interrupt Group Register	Yes
`0x0084`-`0x0FFC`	-	-	-	-	Reserved	-
`0x0100`	GICR_ISENABLER0	RW	32	`0x0`	Interrupt Set-Enable Register	Yes
`0x0104`-`0x017C`	-	-	-	-	Reserved	-
`0x0180`	GICR_ICENABLER0	RW	32	`0x0`	Interrupt Clear-Enable Register	Yes
`0x0184`-`0x01FC`	-	-	-	-	Reserved	-
`0x0200`	GICR_ISPENDR0	RW	32	PPI wire dependent	Interrupt Set-Pending Register	Yes
`0x0204`-`0x027C`	-	-	-	-	Reserved	-
`0x0280`	GICR_ICPENDR0	RW	32	PPI wire dependent	Peripheral Clear Pending Register	Yes
`0x0284`-`0x02FC`	-	-	-	-	Reserved	-
`0x0300`	GICR_ISACTIVER0	RW	32	`0x0`	Interrupt Set-Active Register	Yes
`0x0304`-`0x037C`	-	-	-	-	Reserved	-
`0x0380`	GICR_ICACTIVER0	RW	32	`0x0`	Interrupt Clear-Active Register	Yes
`0x0384`-`0x03FC`	-	-	-	-	Reserved	-
`0x0400`-`0x041C`	GICR_IPRIORITYRn	RW	32	`0x0`	Interrupt Priority Registers	Yes
`0x0420`-`0x0BFC`	-	-	-	-	Reserved	-
`0x0C00`-`0x0C04`	GICR_ICFGRn	RW	32	`0xAAAAAAAA`	Interrupt Configuration Registers	Yes
`0x0C08`-`0x0CFC`	-	-	-	-	Reserved	-
`0x0D00`	GICR_IGRPMODR0	RW	32	`0x0`	Interrupt Group Modifier Register	Yes
`0x0D04`-`0x0DFC`	-	-	-	-	Reserved	-
`0x0E00`	GICR_NSACR	RW	32	`0x0`	Non-secure Access Control Register	Yes
`0x0E04`-`0xBFFC`	-	-	-	-	Reserved	-
`0xC000`	GICR_MISCSTATUSR	RO	32	`0x0`	Miscellaneous Status Register, GICR_MISCSTATUSR	^a
`0xC004`	-	-	-	-	Reserved	-
`0xC008`	GICR_IERRVR	RO	32	`0x0`	Interrupt Error Valid Register, GICR_IERRVR	^a
`0xC00C`	-	-	-	-	Reserved	-
`0xC010`	GICR_SGIDR	RW	64	-	SGI Default Register, GICR_SGIDR	^a
`0xC018`-`0xEFFC`	-	-	-	-	Reserved	-
`0xF000`	GICR_CFGID0	RO	32	Configuration dependent	Configuration ID0 Register, GICR_CFGID0	^a
`0xF004`	GICR_CFGID1	RO	32	Configuration dependent	Configuration ID1 Register, GICR_CFGID1	^a

This section contains the following subsections:

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Redistributor registers for SGIs and PPIs summary

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