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Arm Cortex-A55 Core Technical Reference Manual : TRCCIDCCTLR0, Context ID Comparator Control Register 0

TRCCIDCCTLR0, Context ID Comparator Control Register 0

The TRCCIDCCTLR0 controls the mask value for the context ID comparators.

Bit field descriptions

Figure D8-7 TRCCIDCCTLR0 bit assignments


RES0, [31:4]
res0Reserved.
COMP0, [3:0]

Controls the mask value that the trace unit applies to TRCCIDCVR0. Each bit in this field corresponds to a byte in TRCCIDCVR0. When a bit is:

0The trace unit includes the relevant byte in TRCCIDCVR0 when it performs the Context ID comparison.
1The trace unit ignores the relevant byte in TRCCIDCVR0 when it performs the Context ID comparison.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCCIDCCTLR0 can be accessed through the external debug interface, offset 0x680.

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