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Chapter D3 Memory-mapped debug registers
This chapter describes the memory-mapped debug registers and shows examples of how to use them.
It contains the following sections:
EDPIDR0, External Debug Peripheral Identification Register 0
EDPIDR1, External Debug Peripheral Identification Register 1
EDPIDR2, External Debug Peripheral Identification Register 2
EDPIDR3, External Debug Peripheral Identification Register 3
EDPIDR4, External Debug Peripheral Identification Register 4
EDPIDRn, External Debug Peripheral Identification Registers 5-7