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Arm Cortex-A55 Core Technical Reference Manual : EDPIDR0, External Debug Peripheral Identification Register 0

EDPIDR0, External Debug Peripheral Identification Register 0

The EDPIDR0 provides information to identify an external debug component.

Bit field descriptions

Figure D3-10 EDPIDR0 bit assignments


RES0, [31:8]
res0Reserved.
Part_0, [7:0]
0x05 Least significant byte of the debug part number.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The EDPIDR0 can be accessed through the external debug interface, offset 0xFE0.

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