The Translation Lookaside Buffer (TLB) is a cache of recently executed page translations within the MMU. The Cortex®-A55 core implements a two-level TLB structure. The L2 TLB stores all page sizes and is responsible for breaking these down into smaller pages when required for the data-side or instruction-side L1 TLB.
TLB lockdown is not supported.
After reset, an Invalidate All operation is executed and all entries in the TLB are invalidated.