DBGDIDR, Debug ID Register
The DBGDIDR specifies the version of the Debug architecture that is implemented and some features of the debug implementation.
Bit field descriptions
Figure D1-4 DBGDIDR bit assignments
- WRPs, [31:28]
The number of Watchpoint Register Pairs (WRPs) implemented. The number of implemented WRPs is one more than the value of this field. The value is:
The core implements 4 WRPs.
This field has the same value as ID_AA64DFR0_EL1.WRPs.
- BRPs, [27:24]
The number of Breakpoint Register Pairs (BRPs) implemented. The number of implemented BRPs is one more than the value of this field. The value is:
The core implements 6 BRPs.
This field has the same value as ID_AA64DFR0_EL1.BRPs.
- CTX_CMPs, [23:20]
The number of BRPs that can be used for Context matching. This is one more than the value of this field. The value is:
The core implements two Context matching breakpoints, breakpoints 4 and 5.
This field has the same value as ID_AA64DFR0_EL1.CTX_CMPs.
- Version, [19:16]
The Debug architecture version.
The core implements Arm®v8‑A Debug architecture.
- DEVID_imp, 
- nSUHD_imp, 
Secure User Halting Debug not implemented bit. The value is:
The core does not implement Secure User Halting Debug.
- PCSR_imp, 
- SE, 
EL3 implemented. The value is:
The cluster implements EL3.
- RES0, [11:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.