PMCFGR, Performance Monitors Configuration Register
The PMCFGR contains PMU specific configuration data.
Bit field descriptions
The PMCFGR is a 32-bit register.
Figure D6-1 PMCFGR bit assignments
- RES0, [31:17]
- EX, 
Export supported. The value is:
Export is supported. PMCR_EL0.EX is read/write.
- CCD, 
Cycle counter has pre-scale. The value is:
PMCR_EL0.D is read/write.
- CC, 
Dedicated cycle counter supported. The value is:
Dedicated cycle counter is supported.
- Size, [13:8]
Counter size. The value is:
- N, [7:0]
Number of event counters. The value is:
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The PMCFGR can be accessed through the external debug interface, offset