PMPIDR2, Performance Monitors Peripheral Identification Register 2
The PMPIDR2 provides information to identify a Performance Monitor component.
Bit field descriptions
The PMPIDR2 is a 32-bit register.
Figure D6-8 PMPIDR2 bit assignments
- RES0, [31:8]
- Revision, [7:4]
- JEDEC, 
RAO. Indicates a JEP106 identity code is used.
- DES_1, [2:0]
Arm Limited. This is the most significant nibble of JEP106 ID code.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The PMPIDR2 can be accessed through the external debug interface, offset