TRCCCCTLR, Cycle Count Control Register
The TRCCCCTLR sets the threshold value for cycle counting.
Bit field descriptions
The TRCCCCTLR is a 32-bit register.
Figure D8-6 TRCCCCTLR bit assignments
- RES0, [31:12]
- THRESHOLD, [11:0]
- Instruction trace cycle count threshold.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCCCTLR can be accessed through the external debug interface, offset