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TRCIDR5, ID Register 5

The TRCIDR5 returns how many resources the trace unit supports.

Bit field descriptions

Figure D8-32 TRCIDR5 bit assignments


REDFUNCNTR, [31]

Reduced Function Counter implemented:

0Reduced Function Counter not implemented.
NUMCNTR, [30:28]

Number of counters implemented:

0b010Two counters implemented.
NUMSEQSTATE, [27:25]

Number of sequencer states implemented:

0b100Four sequencer states implemented.
RES0, [24]
res0Reserved.
LPOVERRIDE, [23]

Low-power state override support:

1Low-power state override support implemented.
ATBTRIG, [22]

ATB trigger support:

1ATB trigger support implemented.
TRACEIDSIZE, [21:16]

Number of bits of trace ID:

0x07Seven-bit trace ID implemented.
RES0, [15:12]
res0Reserved.
NUMEXTINSEL, [11:9]

Number of external input selectors implemented:

0b100Four external input selectors implemented.
NUMEXTIN, [8:0]

Number of external inputs implemented:

0x1E30 external inputs implemented.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCIDR5 can be accessed through the external debug interface, offset 0x1F4.

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