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TRCPRGCTLR, Programming Control Register

The TRCPRGCTLR enables the ETM trace unit.

Bit field descriptions

The TRCPRGCTLR is a 32-bit register.

Figure D8-57 TRCPRGCTLR bit assignments


RES0, [31:1]
res0Reserved.
EN, [0]

Trace program enable:

0The ETM trace unit interface in the core is disabled, and clocks are enabled only when necessary to process APB accesses, or drain any already generated trace. This is the reset value.
1The ETM trace unit interface in the core is enabled, and clocks are enabled. Writes to most trace registers are ignored.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCPRGCTLR can be accessed through the external debug interface, offset 0x004.

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