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EDCIDR0, External Debug Component Identification Register 0

The EDCIDR0 provides information to identify an external debug component.

Bit field descriptions

The EDCIDR0 is a 32-bit register.

Figure D3-1 EDCIDR0 bit assignments


RES0, [31:8]
res0Reserved.
PRMBL_0, [7:0]
0x0DPreamble byte 0.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The EDCIDR0 can be accessed through the external debug interface, offset 0xFF0.

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