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EDPIDR1, External Debug Peripheral Identification Register 1

The EDPIDR1 provides information to identify an external debug component.

Bit field descriptions

The EDPIDR1 is a 32-bit register.

Figure D3-11 EDPIDR1 bit assignments


RES0, [31:8]
res0Reserved.
DES_0, [7:4]
0xBArm Limited. This is the least significant nibble of JEP106 ID code.
Part_1, [3:0]
0xDMost significant nibble of the debug part number.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The EDPIDR1 can be accessed through the external debug interface, offset 0xFE4.

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