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Memory-mapped PMU register summary

There are PMU registers that are accessible through the external debug interface.

These registers are listed in the following table. For those registers not described in this chapter, see the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

Table D6-1 Memory-mapped PMU register summary

Offset Name Type Description
0x000 PMEVCNTR0_EL0 RW

Performance Monitor Event Count Register 0

0x004 - - Reserved
0x008 PMEVCNTR1_EL0 RW

Performance Monitor Event Count Register 1

0x00C - - Reserved
0x010 PMEVCNTR2_EL0 RW

Performance Monitor Event Count Register 2

0x014 - - Reserved
0x018 PMEVCNTR3_EL0 RW

Performance Monitor Event Count Register 3

0x01C - - Reserved
0x020 PMEVCNTR4_EL0 RW

Performance Monitor Event Count Register 4

0x024 - - Reserved
0x028 PMEVCNTR5_EL0 RW

Performance Monitor Event Count Register 5

0x02C-0xF4 - - Reserved
0x0F8 PMCCNTR_EL0[31:0] RW

Performance Monitor Cycle Count Register

0x0FC PMCCNTR_EL0[63:32] RW
0x200 PMPCSR[31:0] RO

Program Counter Sample Register

0x204 PMPCSR[63:32]
0x208 PMCID1SR RO

CONTEXTIDR_EL1 Sample Register

0x20C PMVIDSR RO VMID Sample Register
0x220 PMPCSR[31:0] RO

Program Counter Sample Register (alias)

0x224 PMPCSR[63:32]
0x228 PMCID1SR RO

CONTEXTIDR_EL1 Sample Register (alias)

0x22C PMCID2SR RO CONTEXTIDR_EL2 Sample Register
0x100-0x3FC - - Reserved
0x418-0x478 - - Reserved
0x47C PMCCFILTR_EL0 RW

Performance Monitor Cycle Count Filter Register

0x600 PMPCSSR_LO RO PMPCSSR, Snapshot Program Counter Sample Register
0x604 PMPCSSR_HI RO
0x608 PMCIDSSR RO PMCIDSSR, Snapshot CONTEXTIDR_EL1 Sample Register
0x60C PMCID2SSR RO PMCID2SSR, Snapshot CONTEXTIDR_EL2 Sample Register
0x610 PMSSSR RO PMSSSR, PMU Snapshot Status Register
0x614 PMOVSSR RO PMOVSSR, PMU Overflow Status Snapshot Register
0x618 PMCCNTSR_LO RO PMCCNTSR, PMU Cycle Counter Snapshot Register
0x61C PMCCNTSR_HI RO
0x620+ 4×n PMEVCNTSRn RO PMEVCNTSRn, PMU Cycle Counter Snapshot Registers 0-5
0x6F0 PMSSCR WO PMSSCR, PMU Snapshot Capture Register
0xC00 PMCNTENSET_EL0 RW

Performance Monitor Count Enable Set Register

0xC04-0xC1C - - Reserved
0xC20 PMCNTENCLR_EL0 RW

Performance Monitor Count Enable Clear Register

0xC24-0xC3C - - Reserved
0xC40 PMINTENSET_EL1 RW

Performance Monitor Interrupt Enable Set Register

0xC44-0xC5C - - Reserved
0xC60 PMINTENCLR_EL1 RW

Performance Monitor Interrupt Enable Clear Register

0xC64-0xC7C - - Reserved
0xC80 PMOVSCLR_EL0 RW

Performance Monitor Overflow Flag Status Register

0xC84-0xC9C - - Reserved
0xCA0 PMSWINC_EL0 WO

Performance Monitor Software Increment Register

0xCA4-0xCBC - - Reserved
0xCC0 PMOVSSET_EL0 RW Performance Monitor Overflow Flag Status Set Register
0xCC4-0xDFC - - Reserved
0xE00 PMCFGR RO PMCFGR, Performance Monitors Configuration Register
0xE04 PMCR_EL0 RW

Performance Monitors Control Register.

This register is distinct from the PMCR_EL0 system register. It does not have the same value.

0xE08-0xE1C - - Reserved
0xE20 PMCEID0 RO PMCEID0_EL0, Performance Monitors Common Event Identification Register 0, EL0
0xE24 PMCEID1 RO PMCEID1_EL0, Performance Monitors Common Event Identification Register 1, EL0
0xE28 PMCEID2 RO

Reserved

0xE2C PMCEID3 RO

Reserved

0xFA4 - - Reserved
0xFA8 PMDEVAFF0 RO MPIDR_EL1, Multiprocessor Affinity Register, EL1
0xFAC PMDEVAFF1 RO MPIDR_EL1, Multiprocessor Affinity Register, EL1
0xFB8 PMAUTHSTATUS RO

Performance Monitor Authentication Status Register

0xFBC PMDEVARCH RO Performance Monitor Device Architecture Register
0xFC0-0xFC8 - - Reserved
0xFCC PMDEVTYPE RO

Performance Monitor Device Type Register

0xFD0 PMPIDR4 RO PMPIDR4, Performance Monitors Peripheral Identification Register 4
0xFD4 PMPIDR5 RO PMPIDRn, Performance Monitors Peripheral Identification Register 5-7
0xFD8 PMPIDR6 RO
0xFDC PMPIDR7 RO
0xFE0 PMPIDR0 RO PMPIDR0, Performance Monitors Peripheral Identification Register 0
0xFE4 PMPIDR1 RO PMPIDR1, Performance Monitors Peripheral Identification Register 1
0xFE8 PMPIDR2 RO PMPIDR2, Performance Monitors Peripheral Identification Register 2
0xFEC PMPIDR3 RO PMPIDR3, Performance Monitors Peripheral Identification Register 3
0xFF0 PMCIDR0 RO PMCIDR0, Performance Monitors Component Identification Register 0
0xFF4 PMCIDR1 RO PMCIDR1, Performance Monitors Component Identification Register 1
0xFF8 PMCIDR2 RO PMCIDR2, Performance Monitors Component Identification Register 2
0xFFC PMCIDR3 RO PMCIDR3, Performance Monitors Component Identification Register 3
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