PMPIDR0, Performance Monitors Peripheral Identification Register 0
The PMPIDR0 provides information to identify a Performance Monitor component.
Bit field descriptions
The PMPIDR0 is a 32-bit register.
Figure D6-6 PMPIDR0 bit assignments
- RES0, [31:8]
- Part_0, [7:0]
Least significant byte of the performance monitor part number.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The PMPIDR0 can be accessed through the external debug interface, offset