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About the Interrupt Controller

The Interrupt Controller is a single functional unit that is located in a Cortex®â€‘A9 MPCore design. It is responsible for centralizing all interrupt sources before dispatching them to each individual Cortex‑A9 processor. There is one interrupt interface per Cortex‑A9 processor.

The Interrupt Controller is memory-mapped. The Cortex‑A9 processors access it by using a private interface through the SCU.

This section contains the following subsections:

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