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Interfaces

CoreSight™ SoC-400 interfaces for connecting to the pins of a SoC, for integration with non-CoreSight parts of the SoC, and for communication between CoreSight components.

CoreSight SoC-400 provides the following interfaces:

  • JTAG and SWD, for debugger control, that share the same pins if they are both supported.
  • CoreSight Trace Port, for off-chip trace capture.

CoreSight SoC-400 provides the following interfaces for integration with non-CoreSight parts of the SoC:

  • AMBA® AXI4.
  • AMBA 3 APB.
  • AMBA 2 AHB.
  • JTAG, for control of legacy on-chip JTAG debug components.
  • AMBA low-power interface.

CoreSight SoC-400 uses the following interfaces internally, which are used for communication between CoreSight components:

  • AMBA APB3.
  • AMBA ATB4.
  • Event interface, for connecting trigger inputs and outputs to the CTI.
  • Channel interface, for connecting CTIs to the CTM.
  • Wide timestamp interface, for providing timestamps to components.
  • Narrow timestamp interface, for efficient communication of the timestamp across the system.
  • Authentication interface.
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